SHALLOW TRENCH ISOLATION PROCESSING WITH LOCAL OXIDATION OF SILICON

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250120169A1
SERIAL NO

18982600

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Abstract

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A method of manufacturing an electronic device includes forming a shallow trench isolation (STI) structure on or in a semiconductor surface layer and forming a mask on the semiconductor surface layer, where the mask exposes a surface of a dielectric material of the STI structure and a prospective local oxidation of silicon (LOCOS) portion of a surface of the semiconductor surface layer. The method also includes performing an oxidation process using the mask to oxidize silicon in an indent in the dielectric material of the STI structure and to grow an oxide material on the exposed LOCOS portion of the surface of the semiconductor surface layer.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCTEXAS USA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Higgins, Robert Martin Plano, US 6 0
Menon, Venugopal Balakrishna Dallas, US 2 0
Wang, Li Plano, US 972 6677
Wu, Xiaoju Dallas, US 55 263

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