GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING OXIDE SUB-FINS

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250120152A1
SERIAL NO

18986226

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Abstract

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Gate-all-around integrated circuit structures having oxide sub-fins, and methods of fabricating gate-all-around integrated circuit structures having oxide sub-fins, are described. For example, an integrated circuit structure includes an oxide sub-fin structure having a top and sidewalls. An oxidation catalyst layer is on the top and sidewalls of the oxide sub-fin structure. A vertical arrangement of nanowires is above the oxide sub-fin structure. A gate stack is surrounding the vertical arrangement of nanowires and on at least the portion of the oxidation catalyst layer on the top of the oxide sub-fin structure.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPSANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
GHANI, Tahir Portland, US 756 7842
GUHA, Biswajeet Hillsboro, US 138 426
GULER, Leonard P Hillsboro, US 170 114
SIVAKUMAR, Swaminathan Beaverton, US 88 710

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