THREE-DIMENSIONAL NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME
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United States of America
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Apr 10, 2025
app pub date -
Dec 19, 2024
filing date -
Dec 19, 2024
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Abstract
A semiconductor device includes a stack including word line layers and insulating layers that are alternatingly stacked, a first block including a first staircase positioned in the stack that extends between first array regions, a second block including a second staircase positioned in the stack that extends between second array regions, a connection region positioned in the stack, wherein the first array regions and the first staircase are positioned at a first side of the connection region, and the second array regions and the second staircase are positioned at a second side of the connection region, and a slit structure positioned in the connection region between the first staircase and the second staircase. The slit structure includes a dielectric material and divides the connection region into a first portion and a second portion.
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