MEMORY DEVICE AND STORAGE DEVICE INCLUDING THE SAME

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250119149A1
SERIAL NO

18897676

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Abstract

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A memory chip performs phase calibration and duty cycle correction operations using first and second loop circuits. The first loop circuit includes a phase detector, a first counter, and a delay cell. The second loop circuit includes a phase generator, the phase detector, a second counter, and a duty correction circuit (DCC).

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU SUWON-SI GYEONGGI-DO 16677

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ahn, Hyunwoo Suwon-si, KR 1 0
Jeong, Daechul Suwon-si, KR 10 16
Kim, Tongsung Suwon-si, KR 29 26
Lee, Hyunsung Suwon-si, KR 1 0
Lee, Seonkyoo Suwon-si, KR 28 53
Shin, Hyeseong Suwon-si, KR 1 0

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