PHASE ADJUSTMENT CIRCUIT
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United States of America
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Issued Date -
Apr 10, 2025
app pub date -
Dec 16, 2021
filing date -
Dec 16, 2021
priority date (Note) -
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Abstract
A phase adjustment circuit includes a clock generation unit (1) which generates a sinusoidal differential clock signal; a variable amplifier (2) which receives a differential clock signal output from the clock generation unit (1) as an input, outputs an amplitude-adjusted differential clock signal, and simultaneously outputs an amplitude-adjusted in-phase signal; an adding unit (3) which adds an in-phase signal to each of a positive phase side and a negative phase side of the differential clock signal output from the variable amplifier (2); a differential transmission line (4) which transmits the differential signal output from the adding unit (3); and a terminal circuit (5) which terminates the differential transmission line (4).
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