Semiconductor Device and Method of Forming Embedded Trace Substrate with Barrier Layer to Inhibit Electromigration
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United States of America
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Issued Date -
Apr 10, 2025
app pub date -
Oct 6, 2023
filing date -
Oct 6, 2023
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Abstract
A semiconductor device has an interconnect substrate with a first conductive layer and a first barrier layer formed over a first portion of the first conductive layer and a second barrier layer formed over a second portion of the first conductive layer. The first barrier layer and second barrier layer substantially surround or enclose the first conductive layer. The first barrier layer is a conductive material, and the second barrier layer includes a non-conductive material. The interconnect structure further has a second conductive layer coupled to the first conductive layer with an insulating layer formed between the first conductive layer and second conductive layer. A third barrier layer is formed over a first portion of the second conductive layer, and a fourth barrier layer is formed over a second portion of the second conductive layer. An electrical component is disposed over the interconnect substrate.
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