INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING THEREOF

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250118575A1
SERIAL NO

18984028

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Abstract

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A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MFG CO LTDNO 8 LI-HSIN RD 6 SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Hsien-Wei Hsinchu, TW 976 9710
Chen, Ming-Fa Taichung City, TW 524 4489
Chen, Ying-Ju Tuku Township, TW 202 1389

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