MASK PATTERN AND METHOD OF FORMING A FINE PATTERN OF A SEMICONDUCTOR DEVICE USING THE SAME
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United States of America
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Issued Date -
Apr 10, 2025
app pub date -
Apr 30, 2024
filing date -
Apr 30, 2024
priority date (Note) -
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Abstract
A mask pattern may include a first spacer and a second spacer. The first spacer may be formed over a layer. The second spacer may be formed over the first spacer. The first spacer and the second spacer may define a mesh structure having a plurality of opened regions. The opened regions may be etched to form a hole array region and a plurality of dummy holes in the layer. The hole array region may include a plurality of holes. The dummy holes may be configured to surround the hole array.
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