SERIAL PASS-THROUGH TECHNIQUES FOR MEMORY DEVICE INTERFACES
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United States of America
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Apr 10, 2025
app pub date -
Jul 16, 2024
filing date -
Jul 16, 2024
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Abstract
Methods, systems, and devices for serial pass-through techniques for memory device interfaces are described. Memory interface circuitry may be configured to receive a command via a first interface having a first set of terminals to configure the memory interface circuitry for a pass-through mode. As part of the pass-through mode, the memory interface circuitry may receive data from an external device via the first interface and output the data to one or more memory devices via a second interface having a second set of terminals. In some examples, the received data may be associated with a write burst, in which the memory interface circuitry may serially receive multiple portions of the data to write to a buffer of the memory interface circuitry. After reaching a threshold quantity of data, the buffer may output the portions of the data to the one or more memory devices via the second interface.
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