SENSE AMPLIFIERS AND OPERATION METHODS THEREOF, AND MEMORY DEVICES INCLUDING THE SAME
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United States of America
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Issued Date -
Apr 10, 2025
app pub date -
Apr 12, 2024
filing date -
Apr 12, 2024
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Abstract
A sense amplifier connected to a bit line and a complementary bit line, the sense amplifier including a first transistor connected between the bit line and a first node and including a first gate terminal connected to a third node, a second transistor connected between the first node and the complementary bit line and including a second gate terminal connected to a fourth node, third transistor connected between the bit line and a second node and including a third gate terminal connected to the third node, and a fourth transistor connected between the complementary bit line and the second node and including a fourth gate terminal connected to the fourth node, wherein first and second RC values viewed from the sense amplifier toward the bit line and the complementary bit line differ, and wherein the second transistor is configured to receive a program voltage during a first time period.
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