COMPACT MEMORY-IN-PIXEL DISPLAY STRUCTURE

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United States of America Patent

APP PUB NO 20250118245A1
SERIAL NO

18482114

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Disclosed are a pixel and a compact memory-in-pixel display (e.g., implemented in a fully-depleted semiconductor-on-insulator processing technology platform). A block of electronic components for a pixel includes a memory cell array, a driving circuit for an LED, and a logic circuit connected between the memory cell array and driving circuit. The memory cell array is above a Pwell, the driving circuit is above an adjacent Nwell, and the logic circuit includes P-type transistors on the Nwell and N-type transistors on the Pwell. A pixel array is above alternating P and N wells with a single buried Nwell below. Specifically, each column of pixels is above adjacent elongated P and N wells and, within each column, adjacent pixels have mirrored layouts. Furthermore, adjacent columns of pixels are above two elongated wells of one type and a shared elongated well of the opposite type therebetween and the adjacent columns have mirrored layouts.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES U S INC2600 GREAT AMERICA WAY SANTA CLARA CA 95054

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alpaslan, Zahir Yilmaz San Marcos, US 2 6
Kim, Juhan Santa Clara, US 174 2142
Parihar, Sanjay Raj Austin, US 1 0
Rashed, Mahbub Cupertino, US 80 644

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