PROCESSOR POWER MANAGEMENT

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250117060A1
SERIAL NO

18883328

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Abstract

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Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to collect user information for a user of a data processing device, generate a user profile for the user of the data processing device from the user information, and set a power profile a processor in the data processing device using the user profile. Other embodiments are also disclosed and claimed.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATIONSANTA CLARA CA

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Appu, Abhishek R El Dorado Hills, US 561 2990
Borole, Bhushan M Rancho Cordova, US 43 114
Fu, Wenyin Folsom, US 56 247
Hoekstra, Eric J Folsom, US 53 2052
Kaburlasos, Nikos Folsom, US 126 670
Kennedy, Jonathan Bristol, GB 67 304
Koker, Altug El Dorado Hills, US 565 3602
Ray, Joydeep Folsom, US 614 3794
Schluessler, Travis T Berthoud, US 161 1683
Shah, Ankur N Folsom, US 84 448
Sinha, Kamal Folsom, US 144 1311
Surti, Prasoonkumar Folsom, US 421 2553
Veernapu, Kiran C Bangalore, IN 84 197
Vembu, Balaji Folsom, US 330 2925

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