ARC REDUCTION AND RF CONTROL FOR ELECTROSTATIC CHUCKS IN SEMICONDUCTOR PROCESSING

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250116001A1
SERIAL NO

18482560

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Abstract

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A semiconductor processing chamber may include a pedestal configured to support a substrate during a plasma-enhanced chemical-vapor deposition (PECVD) process that forms a film on a surface of the substrate. The chamber may also include one or more internal meshes embedded in the pedestal. The one or more internal meshes may be configured to deliver radio-frequency (RF) power to a plasma in the semiconductor processing chamber during the PECVD process. An outer diameter of the one or more internal meshes may be less that a diameter of the substrate. The chamber may further include an RF source configured to deliver the RF power to the one more internal meshes. This configuration may reduce arcing within the processing chamber.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

International Classification(s)

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  • 2023 Application Filing Year
  • C23C Class
  • 1736 Applications Filed
  • 317 Patents Issued To-Date
  • 18.27 % Issued To-Date

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Balasubramanian, Ganesh Fremont, US 139 3648
Chen, Yuanchang Santa Clara, US 1 0
Dun, Zhiling Campbell, US 2 0
Ganta, Sathya Sunnyvale, US 2 0
Garachtchenko, Alexander V Brentwood, US 10 12
Hammond, Edward P Hillsborough, US 18 912
Han, Xinhai Palo Alto, US 61 1469
Jana, Manoj Kumar San Jose, US 1 0
Li, Jian Fremont, US 1062 5232
Lin, Wen-Shan San Jose, US 22 145
Padhi, Deenesh Saratoga, US 150 5722
Rocha-Alvarez, Juan Carlos San Carlos, US 226 10949
Yau, Allison Mountain View, US 10 2
Zhang, Wenhao San Jose, US 139 867

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