CURRENT MIRROR CIRCUIT TO COMPENSATE PROCESS VARIATION EFFECTS
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United States of America
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Issued Date -
Apr 3, 2025
app pub date -
Jun 6, 2024
filing date -
Jun 6, 2024
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Abstract
Systems and methods described herein correspond to current mirror circuitry that involves one or more transistors operated in a saturation region and one or more transistors operated in a triode region. By using a combination of transistors operated in the triode region and transistors operated in the saturation region operations, gain of the current mirror circuitry may be adjusted while maintaining permissible amounts of main current generation.
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