DYNAMIC BIASING CIRCUITRY FOR TRANSCONDUCTANCE AMPLIFIER STAGE
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United States of America
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Issued Date -
Apr 3, 2025
app pub date -
Oct 2, 2024
filing date -
Oct 2, 2024
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Abstract
An integrated circuit (IC) includes: first and second transistors having a respective first terminal, a respective second terminal, and a respective control terminal; and cascode circuitry having a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, and a sixth terminal. The first terminal of the cascode circuitry is coupled to the control terminal of the first transistor. The second terminal of the cascode circuitry is coupled to the control terminal of the second transistor. The third terminal of the cascode circuitry is coupled to the second terminal of the first transistor. The fourth terminal of the cascode circuitry is coupled to the second terminal of the second transistor. The IC also includes dynamic biasing circuitry having a first terminal and a second terminal. The first terminal of the dynamic biasing circuitry is coupled to the first terminals of the first and second transistors.
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