THROUGH-GLASS VIA LINERS FOR INTEGRATED CIRCUIT DEVICE PACKAGES

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250112163A1
SERIAL NO

18375203

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Abstract

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An IC die package includes a substrate comprising glass and a plurality of holes extending through the glass. A via metallization is present within the holes. A liner is between the via metallization and the glass. The liner can comprise a beta-titanium alloy layer, polymer hydrogel layer and an MXene seed layer, an organic material layer and a metal layer, or an organic material layer between first and second metal layers. A polymer layer may be formed by electrodeposition of charged nanoparticles.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Balch, Brian Chandler, US 3 0
Bryks, Whitney Tempe, US 37 9
Duan, Gang Chandler, US 322 1216
Eze, Vincent Obiozo Chandler, US 1 0
Grujicic, Darko Chandler, US 49 15
Haehn, Nicholas Scottsdale, US 14 9
Kong, Jieying Chandler, US 27 2
Kornbluth, Yosef Phoenix, US 9 0
Li, Yuqin Chandler, US 17 95
Liu, Kuang Quen Creek, US 16 23
Mishra, Pratyush Tempe, US 8 0
Mohammadighaleni, Mahdi Phoenix, US 12 0
Mohapatra, Pratyasha Hillsboro, US 4 0
Page, Mitchell Mesa, US 7 0
Paital, Sameer Mesa, US 28 36
Palmer, Travis San Diego, US 2 0
Pietambaram, Srinivas Chandler, US 138 192
Shanmugam, Rengarajan Tempe, US 21 8
Stacey, Joshua Chandler, US 11 0
Sun, Xing Chandler, US 72 596
Tripathi, Astitva Mesa, US 6 0
Vehonsky, Jacob Chandler, US 17 5
Wandera, Daniel Chandler, US 9 3

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