VIRTUAL GROUND NET FOR PROCESS-INDUCED DAMAGE PREVENTION
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United States of America
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Issued Date -
Apr 3, 2025
app pub date -
Sep 29, 2023
filing date -
Sep 29, 2023
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Abstract
Integrated circuit (IC) devices and systems with virtual ground nets, and methods of forming the same, are disclosed herein. In one embodiment, an integrated circuit die includes a device layer with transistors, a first interconnect over the device layer, and a second interconnect under the device layer. Moreover, the first interconnect includes ground traces, which are electrically coupled to each other in the first interconnect or the second interconnect.
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