INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250112087A1
SERIAL NO

18480225

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Abstract

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A method for fabricating an integrated circuit device is provided. The method includes depositing a first dielectric layer; depositing a second dielectric layer over the first dielectric layer; etching a trench opening in the second dielectric layer, wherein the trench opening exposes a first sidewall of the second dielectric layer and a second sidewall of the second dielectric layer, the first sidewall of the second dielectric layer extends substantially along a first direction, and the second sidewall of the second dielectric layer extends substantially along a second direction different from the first direction in a top view; forming a via etch stop layer on the first sidewall of the second dielectric layer, wherein the second sidewall of the second dielectric layer is free from coverage by the via etch stop layer; forming a conductive line in the trench opening; and forming a conductive via over the conductive line.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHEN, Hsin-Ping Hsinchu County, TW 59 108
CHU, Hwei-Jay Hsinchu City, TW 15 1
DAI, Yu-Teng New Taipei City, TW 45 11
LIAO, Chan-Yu Yunlin County, TW 2 0
LIAO, Wei-Hao Taichung City, TW 89 125
LU, Chih Wei Hsinchu City, TW 90 469
SU, Chia-Wei Taoyuan City, TW 61 2535
SU, Li-Ling Taichung County, TW 5 0
TIEN, Hsi-Wen Hsinchu County, TW 92 157
WEI, Tzu-Hui Zhubei City, TW 9 19
WU, Yung-Hsu Taipei City, TW 62 446
YAO, Hsin-Chieh Hsinchu City, TW 65 259

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