CHAMBER ARRANGEMENTS, SEMICONDUCTOR PROCESSING SYSTEMS INCLUDING CHAMBER ARRANGEMENTS AND RELATED MATERIAL LAYER DEPOSITION METHODS
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United States of America
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Issued Date -
Apr 3, 2025
app pub date -
Sep 27, 2024
filing date -
Sep 27, 2024
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Abstract
A chamber arrangement for a semiconductor processing system includes a chamber body, a substrate support, a first chamber pyrometer, and a second chamber pyrometer. The chamber body has an exterior surface, a hollow interior, and the substrate support is supported for rotation within the interior of the chamber body. The first chamber pyrometer and second chamber pyrometer are optically coupled to the exterior surface of the chamber body. The first chamber pyrometer is configured to acquire a first temperature measurement at a first location on the exterior surface of the chamber body, and the second chamber pyrometer is configured to acquire a second temperature measurement at a second location on the exterior surface of the chamber body. The second location is offset from the first location to throttle temperature across the exterior surface of the chamber body between the first location and the second location. Material layer deposition methods and computer program products are also described.
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