FRONT-END-OF-LINE (FEOL) CAPACITOR STRUCTURE
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United States of America Patent
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Issued Date -
Mar 27, 2025
app pub date -
Sep 22, 2023
filing date -
Sep 22, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
The present disclosure relates to an integrated chip. The integrated chip includes a first capacitor conductor disposed over an isolation structure arranged within a substrate. The isolation structure laterally extends past opposing outer sidewalls of the first capacitor conductor. A capacitor dielectric is arranged along one of the opposing outer sidewalls of the first capacitor conductor and over a top surface of the first capacitor conductor. A second capacitor conductor is arranged along an outer sidewall of the capacitor dielectric and over a top surface of the capacitor dielectric. The second capacitor conductor laterally overlaps parts of both the capacitor dielectric and the first capacitor conductor.
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