CIRCUIT FACILITATING OPTIMIZATION OF DATA FREQUENCY AND POWER CONSUMPTION AND A METHOD THEREOF
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United States of America Patent
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Issued Date -
Mar 27, 2025
app pub date -
Dec 21, 2023
filing date -
Dec 21, 2023
priority date (Note) -
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Abstract
A circuit and a method for optimizing data frequency and power consumption has a circuit comprising a flip flop which comprises a plurality of latches interconnected. Each latch of the plurality of latches comprises a plurality of pairs of transistors comprising a first plurality of transistors. The at least one transistor of the first plurality of transistors is connected to ground and at least another transistor of the first plurality of transistors is connected to power supply. Further, each latch of the plurality of latches comprises a second plurality of transistors and a third plurality of transistors. The third plurality of transistors is configured between the first plurality of transistors and the second plurality of transistors. Further, each transistor of the third plurality of transistors is connected to at least one of a transistor of the first plurality of transistors or a transistor of the second plurality of transistors.
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