ACCELERATOR STRUCTURE, METHOD FOR GENERATING ACCELERATOR STRUCTURE, AND DEVICE THEREOF
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United States of America Patent
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Issued Date -
Mar 27, 2025
app pub date -
Sep 29, 2022
filing date -
Sep 29, 2022
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Abstract
The present disclosure relates to an accelerator structure and a device thereof, a method for generating an accelerator structure, and a computer-readable storage medium, a computer program product and a computer apparatus thereof. The accelerator structure of the present disclosure includes: a computing layer, which is provided with a plurality of chip on wafer (CoW) units, each of which includes a first die group and a second die group; a module layer, which is provided with a power module die group and an interface module die group; and a line layer, which is arranged between the computing layer and the module layer. The power module die group supplies power to the first die group and the second die group through the line layer. The first die group and the second die group output a computing result through the interface module die group via the line layer.
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