Semiconductor Device and Method of Forming Fine-Pitch Interconnection Using Insulating Layer

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20250105162A1
SERIAL NO

18471960

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor device has an interconnect substrate and a plurality of conductive pads formed over a first surface of the interconnect substrate. The conductive pads have a fine pitch. An insulating layer is formed over the conductive pads. The insulating layer is formed over a side surface and a top surface of the conductive pads. An electrical component is disposed over the first surface of the interconnect substrate. The electrical component has an interconnect structure making electrical connection to the conductive pads through the insulating layer while leaving a portion of the insulating layer over a side surface of the interconnect structure. The interconnect structure breaks through the insulating layer under force and pressure by TCB to leave the portion of the insulating layer over the side surface of the interconnect structure to avoid an electrical short between the conductive pads.

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Patent Owner(s)

Patent OwnerAddress
JCET STATS CHIPPAC KOREA LIMITED299 JAYUMUYEOK-RO JUNG-GU INCHEON 22379

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, HeeSoo Incheon, KR 150 919
Lee, HunTeak Gyeonggi-do, KR 53 231
Lee, SangHoon Incheon, KR 209 1098
Lee, SeungHyun Incheon, KR 196 487

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