LOW RESISTANCE INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE
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United States of America Patent
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Issued Date -
Mar 27, 2025
app pub date -
Dec 11, 2024
filing date -
Dec 11, 2024
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Abstract
The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.
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