MEMORY DEVICE, TEST METHOD OF THE MEMORY DEVICE, AND METHOD OF MANUFACTURING MEMORY DEVICE INCLUDING THE TEST METHOD

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United States of America Patent

APP PUB NO 20250104791A1
SERIAL NO

18668224

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Abstract

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A memory device includes: a built-in self-test circuit configured to select a first target bank and a second target bank for each of a plurality of row addresses such that each of a plurality of memory banks is selected as the first target bank and the second target bank at least once, and to perform parallel tests on the first and second target banks for each of the plurality of row addresses; a comparator configured to compare first data output from the first target bank and second data output from the second target bank, and to output a fail signal according to a comparison result thereof; and a built-in analysis circuit configured to update a fail bank table indicating fail information of each of the plurality of memory banks, in response to the fail signal, and to determine a defective bank by referring to the fail bank table.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTDGYEONGGI-DO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Jaehoon Suwon-si, KR 132 514
Park, Jaewon Suwon-si, KR 27 283
Sohn, Kyomin Suwon-si, KR 38 68

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