SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
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United States of America Patent
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Issued Date -
Mar 27, 2025
app pub date -
Dec 6, 2024
filing date -
Dec 6, 2024
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Abstract
A memory device includes a memory die bonded to a logic die via a wafer-on-wafer bond. A controller of the memory device that is coupled to the memory die can activate a row of the memory die. Responsive to activating the row, a sense amplifier stripe of the memory die can latch a first plurality of signals. A transceiver can route a second plurality of signals from the sense amplifier stripe to the logic die.
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