MANAGING ERROR COMPENSATION USING CHARGE COUPLING AND LATERAL MIGRATION SENSITIVITY

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United States of America Patent

APP PUB NO 20250103218A1
SERIAL NO

18975874

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Abstract

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A system comprising a memory device comprising a plurality of memory cells and a processing device, operatively coupled with the memory device, to perform operations. The processing device determines, for each memory cell of the plurality of memory cells, a respective value of a metric that reflects a sensitivity of a threshold voltage of the memory cell to a change in an adjacent memory cell. The processing device determines, for each wordline of a plurality of wordlines of the memory device, based on the determined values of the metric, a respective aggregate measure of adjacent cell dependence. The processing device categorizes the wordlines into one or more wordline groups based on comparing, for each wordline, the determined aggregate measure of adjacent cell dependence to at least one threshold dependence value.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SOUTH FEDERAL WAY BOISE ID 83716-9632

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kaynak, Mustafa N San Diego, US 162 465
Khayat, Patrick R San Diego, US 87 329
Parthasarathy, Sivagnanam Carlsbad, US 258 1182

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