SILICON WAFERS HAVING PASSIVATED CONTACTS
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
N/A
Issued Date -
Mar 20, 2025
app pub date -
Sep 16, 2024
filing date -
Sep 16, 2024
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
The present disclosure relates to a wafer that includes a silicon core having a textured surface and a dielectric layer having a first thickness, where the textured surface includes a plurality of features where each feature is characterized by a first point and a second point separated by a distance, H, at least a portion of the features further include a solid channel positioned substantially at or near the first point, and the solid channel passes through at least a portion of the first thickness.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully