PLUGS FOR INTERCONNECT LINES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250098258A1
SERIAL NO

18970265

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Abstract

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Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin. An isolation structure surrounds a lower fin portion, the isolation structure comprising an insulating material having a top surface, and a semiconductor material on a portion of the top surface of the insulating material, wherein the semiconductor material is separated from the fin. A gate dielectric layer is over the top of an upper fin portion and laterally adjacent the sidewalls of the upper fin portion, the gate dielectric layer further on the semiconductor material on the portion of the top surface of the insulating material. A gate electrode is over the gate dielectric layer.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPCALIFORNIA USA CALIFORNIA

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AUTH, Christopher P Portland, US 77 677
HATTENDORF, Michael L Portland, US 104 1374
JIN, Ilsup Portland, US 5 8
KANDAS, Angelo Portland, US 6 38
YEOH, Andrew W Portland, US 31 209

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