MEMORY DEVICES INCLUDING PAD STRUCTURES
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United States of America
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Issued Date -
Mar 20, 2025
app pub date -
Dec 5, 2024
filing date -
Dec 5, 2024
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Abstract
A microelectronic device comprises a base structure, a memory array overlying the base structure, and a conductive pad tier overlying the memory array. The base structure comprises a logic region including logic devices. The memory array comprises vertically extending strings of memory cells within a horizontal area of the logic region of the base structure. The conductive pad tier comprises first conductive pads substantially outside of the horizontal area of the logic region of the base structure, and second conductive pads horizontally neighboring the first conductive pads and within the horizontal area of the logic region of the base structure. Memory devices and electronic systems are also described.
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