Analog-to-Digital Converter Non-Linearity Model Estimation Using Single-Bit Digital-to-Analog Converter

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United States of America

APP PUB NO 20250096810A1
SERIAL NO

18470309

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Abstract

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A training signal generator for forming an input signal for an ADC-under-test includes a one-bit DAC and an analog low-pass filter. The one-bit DAC converts a binary sequence into a DAC output signal that is then filtered by the analog low-pass filter to form an ADC input signal. The ADC-under-test converts the ADC input signal into an ADC output signal. A digital low-pass filter converts the binary sequence into a plurality of samples. A digital signal processing system processes the plurality of samples and the ADC output signal to form an estimate of the ADC input signal. An ADC linearizer may then be trained to characterize a non-linear impairment of the ADC-under-test responsive to a comparison of the estimate of the ADC input signal and the ADC output signal.

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Patent Owner(s)

Patent OwnerAddress
QUALCOMM INCORPORATED5775 MOREHOUSE DRIVE SAN DIEGO CA 92121-1714

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DAGHER, Elias Laguna Niguel, US 16 128
GUTMAN, Igor Hod HaSharon, IL 111 257
LUO, Tao San Diego, US 5517 35959
MIRHAJ, Seyed Arash Poway, US 18 75
SEDIGHI, Behnam La Jolla, US 25 55
WANG, Hua Basking Ridge, US 727 11009

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