ERROR DETECTORS AND MEMORY DEVICES HAVING ERROR DETECTORS THEREIN, AND METHODS OF PERFORMING ERROR DETECTION
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United States of America
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Issued Date -
Mar 20, 2025
app pub date -
Apr 16, 2024
filing date -
Apr 16, 2024
priority date (Note) -
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status (Latency Note)
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Abstract
An error detector includes a first pulse generator configured to generate first and second interval signals in response to a plurality of phase signals, a first low-pass filter configured to convert the first and second interval signals into respective first and second voltages, and a first comparator configured to determine an error in a first phase signal among the plurality of phase signals, in response to the first and second voltages. The first pulse generator may be configured to generate the first interval signal in response to the first phase signal and a second phase signal among the plurality of phase signals, and generate the second interval signal in response to the first phase signal and a third phase signal among the plurality of phase signals.
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