PROTECTION STRUCTURE FOR AN ENHANCEMENT-MODE FET OF A CIRCUIT AND CORRESPONDING METHOD

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250096799A1
SERIAL NO

18819313

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Abstract

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The present invention relates to a circuit comprising a self-conducting transistor referred to as power transistor, a further transistor referred to as control transistor, a further transistor referred to as first protection transistor, and a string referred to as a Zener string, which comprises at least one Zener diode, wherein the power transistor is coupled between a first terminal of the circuit and a first node of the circuit, wherein the control transistor is coupled between the first node and a second terminal of the circuit, wherein a gate terminal of the control transistor is coupled to a third terminal of the circuit, wherein the first protection transistor is coupled between the first node and the second terminal, and wherein the Zener string is coupled between the first terminal and a gate terminal of the first protection transistor.

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Patent Owner(s)

Patent OwnerAddress
NXP USA INC6501 WILLIAM CANNON DRIVE WEST AUSTIN TX 78735

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Khemka, Vishnu Chandler, US 33 237
Pigott, John PHOENIX, US 41 61
Saxena, Tanuj Chandler, US 16 28

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