PAGE FAULTING AND SELECTIVE PREEMPTION
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United States of America
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Issued Date -
Mar 20, 2025
app pub date -
Sep 23, 2024
filing date -
Sep 23, 2024
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Abstract
One embodiment provides a graphics processor comprising a system interface and circuitry coupled with the system interface. The circuitry includes an execution resource and a preemption status register. The execution resource is configured to execute an instruction. During execution of the instruction, the execution resource is to receive a request to preempt execution of a thread associated with the instruction and, based on a value stored in the preemption status register, execute at least one additional instruction after receipt of the request to preempt execution of the thread.
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