EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC) MEMORY WITHOUT DEDICATED ECC BITS

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250094275A1
SERIAL NO

18808871

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The technology disclosed herein comprises a processor; a memory to store data and a plurality of error correcting code (ECC) bits associated with the data; and a memory controller coupled to the memory, the memory controller to receive a write request from the processor and, when an access control field is selected in the write request, perform an exclusive OR (XOR) operation on the plurality of ECC bits and a fixed encoding pattern to generate a plurality of encoded ECC bits and store the data and the plurality of encoded ECC bits in the memory.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATIONSANTA CLARA CA

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Agarwal, Rajat Portland, US 104 1163
Deutsch, Sergej Hillsboro, US 64 697
Durham, David M Beaverton, US 311 6124
Grewal, Karanvir Hillsboro, US 51 1086

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation