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United States of America

APP PUB NO 20250093899A1
SERIAL NO

18468263

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Abstract

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A receiver circuit receives an input voltage waveform from a single wire and generates an output bit stream. The receiver includes a voltage determination circuit which indicates whether a voltage level of the input voltage waveform has one of a high level that is higher than a high voltage threshold, a low level that is lower than a low voltage threshold, or a mid level that is between the high and low voltage levels. The receiver includes a bit value generator which provides a next bit value of the output bit stream as a first value when the voltage level is the high level, as a second value when the voltage level is the low level, and as a same value as an immediately previous bit value of the output bit stream when the voltage level is the mid level. The first and second values correspond to opposite logic states.

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Patent Owner(s)

Patent OwnerAddress
NXP B VHIGH TECH CAMPUS 60 EINDHOVEN NL-5656 AG

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kruecken, Joachim Josef Maria Munich, DE 5 5
Laudenbach, Andreas Haag, DE 9 41

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