METHODS FOR MAKING SEMICONDUCTOR-BASED INTEGRATED CIRCUITS

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250093765A1
SERIAL NO

18970834

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Abstract

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A method for making a IC is provided, including: identifying, in a schematic, first and second edge elements, which edge elements including devices whose layout patterns are configured to conform to a first layout grid; identifying all the elements between the first and second edge elements, at least one of the identified elements including a device whose layout pattern is configured to conform to a second layout grid that is finer than the first layout grid; and calculating a spatial quantity of a combined layout pattern of the identified elements between the first and second edge elements to determine whether the combined layout pattern conforms to the first layout grid.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MFG CO LTDNO 8 LI-HSIN RD 6 SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU

International Classification(s)

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  • 2024 Application Filing Year
  • G06F Class
  • 24496 Applications Filed
  • 1771 Patents Issued To-Date
  • 7.23 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHEN, YU-HAO HSINCHU CITY, TW 61 370
KUAN, JUI-FENG HSINCHU COUNTY, TW 68 360
LEE, HUI-YU HSIN-CHU CITY, TW 24 62
WU, CHIEN-TE HSINCHU CITY, TW 38 48

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges277801501 - 10020004000600080001000012000140001600018000200002200024000260002800030000

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