Importance

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Abstract

A three-dimensional semiconductor device includes a first active region on a substrate, including a first active region on a substrate, including a lower channel pattern and lower source/drain patterns connected to the lower channel pattern, the lower channel pattern including a plurality of lower semiconductor patterns stacked and spaced apart from each other in a first direction that is perpendicular to an upper surface of the substrate, and the lower semiconductor patterns including a lowermost first semiconductor pattern, a second active region stacked on the first active region, including an upper channel pattern and an upper source/drain pattern connected to the upper channel pattern, a lower gate electrode on the lower channel pattern, and a lower insulating pattern under the first semiconductor pattern, the first semiconductor pattern spaced apart from the lower insulating pattern in the first direction. The lower gate electrode includes a first portion adjacent to a first sidewall of the lower insulating pattern and extending in the first direction from an upper surface to a bottom surface of the lower gate electrode, a second portion adjacent to a second sidewall of the lower insulating pattern and extending in the first direction from the upper surface to the bottom surface of the lower gate electrode, the second sidewall facing the first sidewall in a second direction which is perpendicular to the first direction, and a third portion in contact with a bottom surface of the lower insulating pattern and extending from the first portion to the second portion in the second direction.

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First Claim