FRAME DESIGN IN EMBEDDED DIE PACKAGE

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250087591A1
SERIAL NO

18960733

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Abstract

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In one example, embedded die package, including a layer having an exposed boundary, wherein at least a portion of the exposed boundary comprises organic material. The package also includes at least one integrated circuit die positioned in the layer and within the exposed boundary. The package also includes a dielectric material positioned in the layer and between the at least one integrated circuit and structure adjacent the at least one integrated circuit.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCTEXAS USA TEXAS

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aoya, Kengo Beppu, JP 36 256
Arora, Vivek Kishorechand San Jose, US 33 73
Kim, Woochan Sunnyvale, US 130 780
Masumoto, Mutsumi Beppu, JP 56 674
Matasuura, Masamitsu Beppu, JP 2 0
Matsunaga, Hideaki Beppu, JP 12 52
Nguyen, Hau Thanh San Jose, US 9 20
Poddar, Anindya Sunnyvale, US 96 798

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