METHODS FOR FABRICATING SEMICONDCUTOR STRUCTURES

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United States of America

APP PUB NO 20250087496A1
SERIAL NO

18959832

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Abstract

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Embodiments of the present disclosure relates to method of forming trench and via features using dielectric and metal mask layers. Particularly, embodiments of present disclosure provide a hard mask stack including a first dielectric mask layer, and second dielectric mask layer and a metal mask layer, wherein the first dielectric mask layer and second dielectric mask layer have a high etch selectivity.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDNO 8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
SU, Yi-Nien Hsinchu, TW 57 315

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