MEMORY CIRCUIT, SYSTEM AND METHOD OF ORGANIZATION FOR RAPID RETRIEVAL OF DATA SETS
Number of patents in Portfolio can not be more than 2000
United States of America
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Issued Date -
Mar 13, 2025
app pub date -
Nov 22, 2024
filing date -
Nov 22, 2024
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Abstract
A 3-dimensional array of NOR memory strings being organized by planes of NOR memory strings, in which (i) the storage transistors in the NOR memory strings situated in a first group of planes are configured to be programmed, erased, program-inhibited or read in parallel, and (ii) the storage transistors in NOR memory strings situated within a second group of planes are configured for storing resource management data relating to data stored in the storage transistors of the NOR memory strings situated within the first group of planes, wherein the storage transistors in NOR memory strings in the second group of planes are configured into sets.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
SUNRISE MEMORY CORPORATION | 225 CHARCOT AVENUE SAN JOSE CA 95131 |
International Classification(s)

- 2024 Application Filing Year
- G06N Class
- 5602 Applications Filed
- 354 Patents Issued To-Date
- 6.32 % Issued To-Date
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Harari, Eli | Saratoga, US | 121 | 4591 |
# of filed Patents : 121 Total Citations : 4591 |
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- G06N Class
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