PHASE-LOCKED LOOP CIRCUIT INCLUDING A PLURALITY OF CAPACITOR CELLS AND METHOD OF CONTROLLING THE SAME
Number of patents in Portfolio can not be more than 2000
United States of America
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Issued Date -
Mar 6, 2025
app pub date -
Aug 20, 2024
filing date -
Aug 20, 2024
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A phase-locked loop circuit includes an oscillator including a plurality of capacitor cells, and a control logic circuit that receives an output from the oscillator. The control logic circuit compares a target frequency with a first frequency of a first signal output from the oscillator, generates a first input code to control at least a portion of the plurality of capacitor cells to output a signal having the target frequency based on the comparison, generates a first output code corresponding to the first input code when the first input code is within a predetermined range of input codes, and controls at least two capacitor cells from among the plurality of capacitor cells based on the first output code. The oscillator may output a second signal having a second frequency through an electrical path including capacitor cells other than grounded capacitor cells from among the plurality of capacitor cells.
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