INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING AND OPERATING THE SAME
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
N/A
Issued Date -
Mar 6, 2025
app pub date -
Aug 31, 2023
filing date -
Aug 31, 2023
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
The integrated circuit structure includes a substrate and a memory cell over the substrate. The memory cell includes a channel layer, a first doped region, a second doped region, a first ferroelectric layer, and a first gate layer. The first doped region is at a first side of the channel layer and doped with a first dopant being of a first conductivity type. The second doped region is at a second side of the channel layer opposing the first side and doped with a second dopant being of a second conductivity type different from the first conductivity type. The ferroelectric layer is over the channel layer and between the first and second doped regions. The gate layer is over the ferroelectric layer.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully