PHASE-LOCK LOOP USING PHASE CONVERGENCE COMPENSATION
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United States of America
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Issued Date -
Feb 20, 2025
app pub date -
Aug 9, 2024
filing date -
Aug 9, 2024
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Abstract
Provided is a phase-lock loop that includes: an oscillator having an input for receiving a control signal and an output for providing an output signal having a frequency based on the control signal; a phase detector having a first input for receiving a reference signal, a second input coupled to the output of the oscillator for receiving a feedback signal, and an output for providing a phase-error signal that is indicative of a phase difference between the reference signal and the feedback signal; and a loop filter having a first input coupled to the output of the phase detector, a second input for receiving a proportional-phase-compensation value, and an output for providing the control signal to the oscillator. The control signal comprises a proportional component which is a combination of the phase-error signal and the proportional-phase-compensation value.
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