Low Noise, Supply Rejecting Linear Phase Interpolator
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United States of America
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Issued Date -
Feb 20, 2025
app pub date -
Nov 12, 2023
filing date -
Nov 12, 2023
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Abstract
A phase interpolator circuit includes a capacitance circuit, a switched resistor network, and interpolation management circuitry. The resistor network receives a start-phase signal and an end-phase signal, and generates an interpolated output signal from a voltage on the capacitance circuit. The interpolation management circuitry receives an interpolation code defining an intermediate phase between the start-phase signal and the end-phase signal, charges or discharges the capacitance circuit through the resistor network, and controls the resistor network to set a phase of the interpolated output signal to be the intermediate phase. The interpolation management circuitry also (i) responsively to a transition in the start-phase signal, sets the resistance of the resistor network based on the interpolation code, and (ii) responsively to a voltage level on the capacitance circuit, sets the resistance of the resistor network to a constant resistance, and flows through the capacitance circuit an additional boosting current.
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