TEST APPARATUS AND TEST METHOD FOR DETECTING DEFECTS OF ELEMENTS INCLUDED IN INTEGRATED CIRCUIT
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United States of America
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Feb 20, 2025
app pub date -
Mar 12, 2024
filing date -
Mar 12, 2024
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Abstract
A test apparatus includes an input terminal, a first multiplexer, a plurality of first elements connected in series between the input terminal and the first multiplexer, and a processor. The first multiplexer is connected to each of a plurality of nodes between the plurality of first elements, and the processor is connected to the input terminal and to the first multiplexer. The processor inputs data to the plurality of first elements through the input terminal. The plurality of first elements outputs at least a portion of a plurality of pieces of data through the plurality of nodes between the elements to the first multiplexer. The processor may thereby determine whether a defect has occurred in any of the plurality of first elements by comparing data, output from the multiplexer, with an expected output value.
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