POWER CONTROL APPARATUS FOR NON-VOLATILE MEMORY
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United States of America
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Issued Date -
Feb 20, 2025
app pub date -
Jul 31, 2024
filing date -
Jul 31, 2024
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Abstract
A power control apparatus for a non-volatile memory includes a reference voltage generator, an adjusting circuit and a switching circuit. The adjusting circuit receives a deep standby signal and an operation signal. The adjusting circuit generates a mode indicating signal and a control signal. The switching circuit is connected with a first node. A voltage at the first node is an operation voltage. In a deep standby mode, the ground voltage is connected with the first node through the switching circuit. In a normal operation mode, a supply voltage is connected with the first node through the switching circuit. In a standby mode, an adjustable resistance path is connected between the supply voltage and the first node. The resistance value of the adjustable resistance path is adjusted according to the control signal until the operation voltage is equal to the reference voltage.
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