Truncated Resolution for Time Sliced Computation of Multiplication and Accumulation using a Memory Cell Array
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United States of America
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Feb 20, 2025
app pub date -
Jun 21, 2024
filing date -
Jun 21, 2024
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A memory sub-system configured to perform multiplication and accumulation operations using truncated outputs. For example, voltages can be applied, according to a bit slice having a slice weight in an input, to memory cells storing weights. A resolution control can be applied, according to the slice weight, to an analog to digital converter coupled to the line having a current resulting from the memory cells responsive to the voltages. The analog to digital converter can measure at least one first bit of a quantity representative of a magnitude of the current in the line to provide a truncated output, skipping measuring of at least one second bit of the quantity according to the resolution control. Summing truncated outputs resulting from the bit slices from the input can provide an approximated result of the sum of elements in the input weighted by the weights.
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