Efficient FET Body and Substrate Contacts

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250056875A1
SERIAL NO

18366887

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Abstract

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Integrated circuit structures that significantly reduce the resistance associated with the body contact region and substrate region contact of a field-effect transistor (FET) compared to conventional designs. Embodiments include a FET having a body contact region, and optionally a substrate region contact, that includes germanium (Ge) alone or as an alloy with silicon (SiGe) and/or as a layered combination with silicon (e.g., a layer of Ge on a layer of Si). A first method includes fabricating a body contact region of a field-effect transistor by fabricating the field-effect transistor with an Si body contact region, and diffusing or implanting Ge within the Si. A second method includes fabricating a body contact region of a field-effect transistor by fabricating the field-effect transistor with an Si body contact region, etching away at least part of the Si body contact region to form a well, and depositing Ge within the well.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Singh, Jagar New York, US 124 468
Willard, Simon Edward Irvine, US 76 711

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