Importance

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Abstract

A semiconductor memory device is provided that includes a bit line on a substrate, a protruded insulating pattern on the bit line, and in a channel trench, first and second channel patterns that extend along sidewalls of the channel trench, and spaced apart from the first channel pattern in the first direction, a channel interfacial layer that extends along the sidewalls of the channel trench, and is in contact with the first channel pattern and the second channel pattern, a first word line between the first channel pattern and the second channel pattern, a second word line between the first channel pattern and the second channel pattern, and is spaced apart from the first word line in the first direction and a first capacitor and a second capacitor, which are electrically connected to the first channel pattern and the second channel pattern.

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First Claim